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LR8400 7 8 9 : ? introduction: ? features: the LR8400 devices provide a power supply solution for products powered by either a one-cell, two-cell, or three-cell alkaline, nicd or nimh, or one-cell li-ion or li-polymer battery. the boost converter is based on a fixed frequency, pulse-width-modulation (pwm) controller using a synchronous rectifier to obtain maximum efficiency, which contains an internal nmos switch and pmos synchronous rectifier. the maximum peak current in the boost switch is typically limited to a value of 1.1a. a switching frequency of 1.2mhz minimizes solution footprint by allowing the use of tiny, low profile inductors and ceramic capacitors. the current mode pwm design is internally compensated, reducing external parts count. anti-ringing control circuitry reduces emi concerns by damping the inductor in discontinuous mode. in shutdown, v out and v in are connected, which allows the input battery to be used for backup power. the device features low shutdown current less than 1 a. z up to 96% efficiency z delivers 100ma@3.3v from single aa cell z delivers 300ma@5v from two aa cells z delivers 600ma@5v from single li cell z maintains high efficiency over the output current range for improved battery life z low voltage start-up: 0.85v z continuous switching at light loads z internal synchronous rectifier z current mode control with internal compensation z 1.2mhz fixed frequency switching z input range: 0.9v to5v z output range: 2.5v to 4.5v (up to 5v with schottky) z logic controlled shutdown(<1 a) z anti-ringing control minimizes emi z 1.1a peak switch current limit z over temperature protection z tiny external components ? applications ? z digital still and video cameras z personal information appliances z wireless and dsl modems z personal medical products z gps receivers z lcd bias supplies z handheld instruments z portable audio players ? pin configuration ? order information designator symbol description 7 a standard 89 integer output voltage e.g.3.3v= 8 :3, 9 :3 adj= 8 :, 9 : : e package ? sot23-6 1.1a 1.2mhz synchronous boost converter lr 8400 series leshan radio company, ltd.
? pin configuration: table1. pin description pin number pin name function 1sw switch pin . connect inductor between sw and v in ? optional schottky diode is connected between sw and v out . trace connections made to the inductor and schottky diode should be minimized to reduce power dissipation and increase overall efficiency. keep these pcb trace lengths as short and wide as possible to reduce emi and voltage overshoot. if the inductor current falls to zero, or ce is low, an internal 100 antiringing switch is connected from sw to v in to minimize emi. 2gnd signal and power ground . provide a short direct pcb path between gnd and the (?) side of the output capacitor(s). connect gnd with large copper areas directly to the input and output supply returns and negative terminals of the input and output capacitors. 3 fb/nc feedback input / not connected (for fixed output voltage option). feedback input to the g m erro r amplifier. connect resistor divider tap to this pin. the output voltage can be adjusted from 2.5v to 5.5v by: v out =1.23v v] [1+(r1/r2)] the feedback networks should be connected directly to a dedicated analog ground plane and this ground plane must connect to the gnd pin. if no analog ground plane is available, then the ground connection of the feedback network must tie directly to the gnd pin. the feedback network, resistors r1 and r2 must be connected to fb pin directly as closely as possible. and fb is a sensitive signal node, trace area at fb pin should be small. please keep fb away from the inductor and sw switching node on the pcb layout to minimize copper trace connections that can inject noise into the system. 4 shdn logic controlled shutdown input . shdn=high: normal free running operation , 1.2mhz typical operating frequency. shdn=low: shutdown; quiescent current <1 a. an 100 anti-ringing switch is internally connected between sw and v in . if shdn is driven from a logic -level output, the logic high-level (on) should be referenced to v out to avoid intermittently switching the device on.
pin number pin name function 4 shdn note : if pin shdn is not used, it should be connected directly to pin out.v out is held at approximately v in ? 0.6v in shutdown due to the body diode of the internal pmos. typically, shdn should be connected to v in through a 1m pull-up resistor. if shdn is undefined, pin sw may ring. 5v out dc-dc power output (drain of the internal synchronous rectifier p-mosfet) and output voltage sense input . bias is derived from v out when v out exceeds 2.3v. pcb trace length from v out to the output filter capacitor(s) should be as short and wide as possible. care should be taken to minimize the loop area formed by the output filter capacitor(s) connections, the v out pin, and the LR8400 gnd pin. the minimum recommended output filter capacitance is 4.7 f ceramic with a x5r or x7r dielectric and the optimum placement is closest to the v out pin and the gnd pin. v out is held at approximately v in ? 0.6v in shutdown due to the body diode of the internal pmos. 6v in battery supply input voltage . the device gets its start-up bias from v in . once v out exceeds v in , bias comes from v out . thus, once started, operation is completely independent from v in . operation is only limited by the output power level and the battery?s internal series resistance. the v in pin should be connected to the positive terminal of the battery and bypassed with a low esr ceramic bypass capacitor. care should be taken to minimize the loop area formed by the bypass capacitor connections, the v in pin, and the LR8400 gnd pin. the minimum recommended bypass capacitance is 1 f ceramic with a x5r or x7r dielectric and the optimum placement is closest to the v in pin and the gnd pin. pcb trace length from v in to the input filter capacitor(s) should be as short and wide as possible.
? block diagram
? absolut e maximum ratings (1) (unless otherwise specified, t a =25 c) parameter symbol ratings units input v oltage (2) v in -0.3~ 7 v sw v oltage (2) -0.3~ 7 v shdn v oltage (2) -0.3~ 7 v fb v oltage (2) -0.3~ 6 v v out v oltage (2) -0.3~7 v peak sw sink current i swmax 1500 ma power dissipation sot23-6 p d 400 mw operatin g virtual junction temperature range t j 125 storage t emperature range t stg -40~+ 125 lead t emperature (soldering, 10 sec) t solder 260 esd rating (3) human bod y model - (hbm) 2000 v machine model- (mm) 200 v (1) stresses be yond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. exposure to absolute-maximum-rated conditions for extended periods my affect device reliability. (2) all voltages are with respect to network ground terminal. (3) esd testing is performed according to the respective jesd22 jedec standard. the human body model is a 100 pf capacitor discharged through a 1.5k resistor into each pin. the machine model is a 200pf capacitor discharged directly into each pin. caution t his integrated circuit can be damaged by esd if you don?t pay attention to esd protection. chipower recommends that all integrated circuits be handled with appropriate precautions. failure to observe proper handling and installation procedures can cause damage. esd damage can range from subtle performance degradation to complete device failure. precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ? recommended operating conditions min. nom. max. units supply voltage at v in 0.9 - 5.5 v output volta ge at v out 2.5 - 5.5 v operatin g free air temperature range (1 ) , t a -40 - 85 operating virtual junction temperature range, t j -40 - 125
? electrical characteristics t ypical values are at t a =25 , unle ss otherwise specified, specifications apply for condition v in = v shdn = 1.2 v, v out = 3.3 v p arameter symbol conditions min. typ. (1) max. units minimum sta rt-up voltage v start i load =1ma 0.85 1 v minimum operating v oltage (2) v in v shdn = v in 0.5 0.65 v output v oltage adjust range (3) v out 2.5 5 v feedb ack voltage v fb 1.192 1.230 1.268 v feedback current (4) i fb v fb =1.30v 30 na quiescent curre nt (shutdown) i shdn v shdn =0v , not including switch leakage 0.1 1.0 a quiescent current (active) i q measured on v out 300 500 a nmos switch leakage i nmossw l v shdn =0v ,v sw =5.0v 0.01 1 a pmos switch leakage i pmosswl v shdn =0v ,v sw =0v 0.01 1 a nmos switch on r esistance (5) r onnmos v out = 3.3v 0.35 v out = 5.0v (6 ) 0.20 pmos swit ch on resistance (5) r onpmos v out = 3.3v 0.45 v out = 5.0v (6 ) 0.30 nmos cyc le by cycle current limit (7) i nmoscl v in =2.5v 1.1 a max duty cycle d max v fb = 1.15v 80 87 % oscillator fr equency f osc 0.95 1.2 1.5 mhz shdn "high" voltage (8) v shdn?h? 1.5 v in v shdn "lo w" voltage (9) v shdn?l? 0.35 v shdn input curr ent v shdn =5.5v 0.1 1 a (1) t ypical numbers are at 25c and represent the most likely norm. (2) minimum v in oper ation after start-up is only limited by the battery?s ability to provide the necessary power as it enters a deeply discharged state. (3) the fixed voltage version effective output voltage. (4) bias current flows into fb pin. specification is guaranteed by design and not 100% tested in production. (5) does not include the bond wires. measured directly at the die. (6) specification is guaranteed by design and not 100% tested in production. (7) duty cycle affects current limit due to ramp generator. (8) high voltage level ? forcing shdn above 1.5v enables the part. (9) low voltage level ? forcing shdn below 0.35v shuts down the device. in shutdown, all functions are disabled drawing <1 a supply current. do not leave shdn floating.
? typical application circuits lituium cell c1 4.7 f l1 4.7 h c2 4.7 f v out 5.0v 250ma off on + r2 604k r1 1.85 m 1 6 4 2 3 5 gnd shdn fb v out sw v in use a schottky diode if the converter output voltage is 4.5v or greater. LR8400 figure1. basic application circuit LR8400
? typical performance characteristics (t a =2 5 , unless otherwise specified, test figure1 above)

? detailed description the LR8400 high efficiency synchronous boost converter. able to operate from an input voltage below 1v, the devices feature fixed frequency, current mode pwm control for exceptional line and load regulation. with its low r ds(on) and gate charge internal mosfet switches, the devices maintain high efficiency over a wide range of load current. detailed descriptions of the three distinct operating modes follow. operation can be best understood by referring to the block diagram. the high 1.2mhz switching frequency of the LR8400 facilitates output filter component size reduction for improved power density and reduced overall footprint. it also provides greater bandwidth and improved transient response over other lower frequency step-up converters. the compensation and feedback is integrated with only three external components needed. synchronous rectification the LR8400 integrates a synchronous rectifier to improve efficiency as well as to eliminate the need for an external schottky diode. the synchronous rectifier is used to reduce the conduction loss contributed by the forward voltage of an external schottky diode. the synchronous rectifier is realized by a p-channel mosfet (pmos) with gate control circuitry that incorporates relatively complicated timing concerns. an external schottky diode is required when the output voltage is greater than 4.5v. start-up and inrush current limit the start-up sequence of the LR8400 series depending upon whether the input voltage is greater than or less than 2.3v. under 2.3v, a start-up oscillator operating at 20% duty cycle controls the synchronous power stage charges, the output current is limited to 300ma until the output up to 2.3v. for an input voltage greater than 2.3v, the output is charged at a fixed 1.2mhz frequency. the boost converter then tak es control and continues to charge the output to the steady-state voltage. the boost converter n-channel switch current is limited to 1.1a and the typical start-up time is 0.5ms. slope compensation slope compensation provides stability in constant frequency architecture by preventing sub-harmonic oscillations at high duty cycles. it is accomplished internally by adding a compensating ramp to the inductor current signal at duty cycles in excess of 50%. this control topology features stable switching and cycle-by-cycle current limiting which can prevent the main switch from overstress and the external inductor from saturating, it provides excellent load and line response, low noise fixed frequency operation oscillator: the frequency of operation is internally set to 1.2mhz. current sensing: a signal representing nmos switch current is summed with the slope compensator. the summed signal is compared to the error amplifier output to provide a peak current control command for the pwm. peak switch current is limited to approximately 1a independent of input or output voltage. the current signal is blanked for 40ns to enhance noise rejection. zero current comparator: the zero current comparator monitors the inductor current to the output and shuts off the synchronous rectifier once this current reduces to approximately 20ma. this prevents the inductor current from reversing in polarity improving efficiency at light loads. antiringing control: the antiringing control circuitry prevents high frequency ringing of the sw pin as the inductor current goes to zero by damping the resonant circuit formed by l and c sw (capacitance on sw pin). device shutdown when shdn is set logic high, the LR8400 is put into active mode operation. if shdn is set logic low, the device is put into shutdown mode and consumes less than 1 a of current from battery. in shutdown, the battery input is connected to the output through the inductor and the internal synchronous rectifier p-mosfet. due to the body diode of the internal synchronous rectifier p-mosfet, v out is held at approximately v in - 0.6v during shutdown. this allows the input battery to provide backup power for devices such as an idle microcontroller, memory, or real-time-clock, without the usual diode forward drop. in this way a separate backup battery is not needed. after start-up, the internal circuitry is supplied by v out , however, if shutdown mode is enabled, the internal circuitry will be supplied by the input source again.
? application information the basic LR8400 application circuits are shown in figure 1.external component selection is driven by the load requirement and begins with the selection of l followed by c in and c out . setting the output voltage figure1 shows the basic application circuit of LR8400 adjustable output version. the internal 1.23v reference voltage is compared to the voltage at the fb pin to generate an error signal at the output of the error amplifier. a voltage divider from v out to ground programs the output voltage via fb from 2.5v to 5v using the equation 1: v out = 1.23v ? [1 + (r1/r2)] (1) table 2 lists the recommended values for particular output voltage settings. table 2. resistor selection for v out setting v out r1( )r2( ) 3.3v 1.02m 604k 5.0v 1.02m 332k fixed output voltage the LR8400 has two fixed output voltage options: 3.3v and 5v. an internal resistor divider is connected to the fb pin inside the package which eliminates the need for external feedback resistors. when designing with the fixed output voltage option, remember to leave the fb pin open; otherwise the output voltage will be affected. however, a feed-forward capacitor can still be added between the fb and v out pins to enhance the control loop performance. inductor selection a boost converter normally requires two main passive components for storing energy during the conversion. a boost inductor and a storage capacitor at the output are required. the LR8400 can utilize small surface mount and chip inductors due to their fast 1.2mhz switching frequency. to select the boost inductor, it is recommended to keep the possible peak inductor current below the current limit threshold of the power switch in the chosen configuration. for example, the current limit threshold of the LR8400 's switch is 1.1a. the highest peak current through the inductor and the switch depends on the output load, the input (v in ), and the output voltage (v out ). estimation of the maximum average inductor current is done using equation 2: (2) for example, for an output current of 75ma at 3.3 v, at least 340ma of average current flows through the inductor at a minimum input voltage of 0.9 v. the second parameter for choosing the inductor is the desired current ripple in the inductor. the inductor current ripple is typically set for 20% to 40% of the maximum average inductor current (i l ). a smaller ripple reduces the magnetic hysteresis losses in the inductor, as well as output voltage ripple and emi. but in the same way, regulation time rises at load changes. in addition, a larger inductor increases the total system costs. with these parameters, it is possible to calculate the value for the inductor by using equation 3: (3) parameter f is the switching frequency and ? i l is the ripple current in the inductor, i.e., 40% ? i l . in this example, the desired inductor has the value of 4 h. with this calculated value and the calculated currents, it is possible to choose a suitable inductor. in typical applications, a 4.7 h inductance is recommended. the device has been optimized to operate with inductance values between 2.2 h and 10 h. nevertheless, operation with higher inductance values may be possible in some applications. detailed stability analysis is then recommended. care must be taken because load transients and losses in the circuit can lead to higher currents as estimated in equation 3. also, the losses in the inductor caused by magnetic hysteresis losses and copper losses are a major parameter for total circuit efficiency. the third parameter for choosing the inductor is the saturation current rating of the inductor. the inductor saturation current rating must be selected to be greater than the peak inductor current under full load conditions. (4) high frequency ferrite core inductor materials reduce frequency dependent power losses compared to cheaper powdered iron types, improving efficiency. the inductor should have low esr (series resistance of the windings) to reduce the i 2 r power losses, and must be able to handle the peak inductor current without saturating. molded chokes and some chip inductors usually do not have enough core to support the peak inductor currents of 1.1a seen on the LR8400 . to
minimize radiated noise, use a toroid, pot core or shielded bobbin inductor. different core materials and shapes will change the size/current and price/current relationship of an inductor. the choice of which style inductor to use often depends more on the price vs. size requirements and any radiated field/emi requirements than on what the LR8400 requires to operate. table 3 shows some typical surface mount inductors that work well in LR8400 applications. table3. representative smd inductors part number value ( h) max dcr (m ) rated dc current (a) size wlh (mm) sumida cdrh 3d16 2.2 3.3 4.7 75 110 162 1.20 1.10 0.90 3.83.81.8 sumida cr43 2.2 3.3 4.7 71.2 86.2 108.7 1.75 1.44 1.15 4.34.83.5 sumida cdrh 4d18 2.2 3.3 4.7 75 110 162 1.32 1.04 0.84 4.74.72.0 output and input capacitor selection the major parameter necessary to define the output capacitor is the maximum allowed output voltage ripple of the converter. this ripple is determined by two parameters of the capacitor, the capacitance and the esr. it is possible to calculate the minimum capacitance needed for the defined ripple, supposing that the esr is zero, by using equation 5: (5) parameter f is the switching frequency and ? v is the maximum allowed ripple. with a chosen ripple voltage of 10 mv, a minimum capacitance of 4.5 f is needed. in this value range, ceramic capacitors are a good choice. the esr and the additional ripple created are negligible. it is calculated using equation 6: (6) the total ripple is the sum of the ripple caused by the capacitance and the ripple caused by the esr of the capacitor. additional ripple is caused by load transients. this means that the output capacitor has to completely supply the load during the charging phase of the inductor. the value of the output capacitance depends on the speed of the load transients and the load current during the load change. with the calculated minimum value of 4.5 f and load transient considerations, the recommended output capacitance value is in a 10 f range. care must be taken on capacitance loss caused by derating due to the applied dc voltage and the frequency characteristic of the capacitor. for example, larger form factor capacitors (in 1206 size) have their self resonant frequencies in the same frequency range as the LR8400 operating frequency. so the effective capacitance of the capacitors used may be significantly lower. therefore, the recommendation is to use smaller capacitors in parallel instead of one larger capacitor. low esr (equivalent series resistance) capacitors should be used to minimize the output voltage ripple. multilayer ceramic capacitors are an excellent choice as they have extremely low esr and are available in small footprints. a 4.7 f to 10 f output capacitor with 10v voltage rating is sufficient for most applications. larger values up to 22 f may be used to obtain extremely low output voltage ripple and improve transient response. an additional phase lead capacitor may be required with output capacitors larger than 10 f to maintain acceptable phase margin. x5r and x7r dielectric materials are preferred for their ability to maintain capacitance over wide voltage and temperature ranges. the ripple current through input capacitor is calculated using equation 7: (7) the intput capacitor is selected to handle the input ripple noise requirements. low esr input capacitors reduce input switching noise and reduce the peak current drawn from the battery. it follows that ceramic capacitors are also a good choice for input decoupling and should be located as close as possible to the device. a 4.7 f/6.3v input capacitor is sufficient for virtually any application. a 10 f input capacitor is recommended to improve transient behavior of the regulator and emi behavior of the total power supply circuit. a ceramic capacitor or a tantalum capacitor with a 100-nf ceramic capacitor in parallel, placed close to the ic, is recommended. larger values may be used without limitations. table 4 shows a list of several ceramic capacitor manufacturers. consult the manufacturers directly for detailed information on their entire selection of ceramic parts. table 4. capacitor vendor information supplier website murata www.murata. com tdk w ww.tdk.com
output diode use a schottky diode such as an mbr0520l, pmeg2010ea, 1n5817 or equivalent if the converter output voltage is 4.5v or greater. the schottky diode carries the output current for the time it takes for the synchronous rectifier to turn on. do not use ordinary rectifier diodes, since the slow recovery times will compromise efficiency. a schottky diode is optional for output voltages below 4.5v, but will increase converter efficiency by 2% to 3%. load disconnect in shutdown in conventional synchronous boost converters, a conduction path exists from input to output through the backgate(body diode) of the p-channel mosfet during shutdown. special application circuitry can disconnect the load from the battery during shutdown (see figure 2). pcb layout guidance as for all switching power supplies, the layout is an important step in the design, especially at high-peak currents and high switching frequencies. if the layout is not carefully done, the regulator could show stability problems as well as emi problems. therefore, use wide and short traces for the main current path and for the power ground tracks. the input capacitor, output capacitor, and the inductor should be placed as close as possible to the ic. use a common ground node for power ground and a different one for control ground to minimize the effects of ground noise. connect these ground nodes at any place close to the ground pin of the ic. the feedback divider should be placed as close as possible to the ground pin of the ic. to lay out the control ground, it is recommended to use short traces as well, separated from the power ground traces. this avoids ground shift problems, which can occur due to superimposition of power ground current and control ground current. the high speed operation of the LR8400 demands careful attention to board layout. you will not get advertised performance with careless layout. figure 2 shows the recommended component placement. a large ground pin copper area will help to lower the chip temperature. a multilayer board with a separate ground plane is ideal, but not absolutely necessary. for the best efficiency and minimum noise problems, the following suggestions should be taken. these items are also illustrated graphically in figure 2. 1) it is desirable to maximize the pcb copper area connecting to gnd pin to achieve the best thermal and noise performance. a multilayer board with a separate ground plane is ideal, but not absolutely necessary. 2) the power traces, consisting of the gnd trace, the switching trace and the v in trace should be kept short, direct and wide to allow large current flow. put enough multiply-layer pads when they need to change the trace layer. 3) place the (+) plate of c in near v in as closely as possible and the loop area formed by c in and gnd must be minimized to maintain input voltage steady and filter out the pulsing input current. 4) the gnd of the ic, the (-) plate of c in and c out should be connected as close as possible, together directly to a ground plane. 5) the pcb copper area associated with sw must be minimized to avoid the potential noise problem and reduce emi. 6) the resistive divider r1 and r2 must be connected to fb pin directly as closely as possible. and fb is a sensitive node. please keep it away from sw on the pcb layout to avoid the noise problem. 7) if the system chip interfacing with the shdn pin has a high impedance state at shutdown mode and the v in is connected directly to a power source such as a li-ion battery, it is desirable to add a pull down 1mohm resistor between the shdn and gnd pins to prevent the noise from falsely turning on the boost regulator at shutdown mode. recommended component placement. traces carrying high current are direct. trace area at fb pin is small. lead length to battery is short. figure2. recommended component placement for single layer board
application examples the LR8400 is perfectly suited for led matrix displays, bar-graph displays, instrument-panel meters, dot matrix displays, set-top boxes, white goods, professional audio equipment, medical equipment, industrial controllers to name a few applications. along with figure 1 on page 7, figures 3-19 depict a few of the many applications for which the LR8400 converters are perfectly suited. list of components: u1 = lr 8400ae l1 = 4.7 h taiyo yuden cb2016b4r7m c1 = 1 x 4.7 f, 0603, x7r/x5r ceramic c2 = 2 x 4.7 f, 0603, x7r/x5r ceramic figure 3. power supply solution having small total solution size list of components: u1 = lr 8400ae l1 = 4.7 h taiyo yuden cb2016b4r7m c1 = 1 x 4.7 f, 0603, x7r/x5r ceramic c2 = 2 x 4.7 f, 0603, x7r/x5r ceramic figure 4. power supply solution for powering white leds in lighting applications LR8400 LR8400
list of components: u1 = lr 8400ae l1 = 4.7 h wurth elektronik 744031004 c1 = 2 x 4.7 f, 0603, x7r/x5r ceramic c2 = 2 x 4.7 f, 0603, x7r/x5r ceramic figure 5. power supply solution with auxiliary positive output voltage v in shdn gnd fb r 2 v out LR8400 c 3 l1 c 1 sw r 1 1 6 4 2 3 5 v cc boost output c 4 ds1 powe r supply c 2 v cc2 ~ - 9 && unregulated auxiliary output 0.1 - f 1 - f list of components: u1 = lr 8400ae l1 = 4.7 h wurth elektronik 744031004 c1 = 2 x 4.7 f, 0603, x7r/x5r ceramic c2 = 2 x 4.7 f, 0603, x7r/x5r ceramic figure 6. power supply solution with auxiliary negative output voltage LR8400
v in shdn gnd fb r 2 v out on LR8400 c3 750k off l1 c 1 sw aa battery 4.7 - f 1% r 1 1.02m 1% 1 6 4 2 3 5 v out1 =3v,90ma c 2 d1 d2 v out2 =- 3v,10ma 1 - f c 4 10 - f list of components: u1 = lr 8400ae l1 = 4.7 h wurth elektronik 744031004 c1 = 1 x 4.7 f, 0603, x7r/x5r ceramic c2 = 1 x 4.7 f, 0603, x7r/x5r ceramic figure 7. single aa cell to 3v synchronous boost converter list of components: u1 = lr 8400ae l1 = 4.7 h wurth elektronik 744031004 c1 = 1 x 4.7 f, 0603, x7r/x5r ceramic c2 = 1 x 4.7 f, 0603, x7r/x5r ceramic figure 8. single aa cell to 3.3v synchronous boost converter with load disconnect in shutdown LR8400
v in shdn gnd fb r 2 v out on LR8400 d1 332k off l1 c 1 sw lith ium battery c 2 1% r 1 1.02m 1% 1 6 4 2 3 5 100nf 2 optional sn ubber c 3 100pf list of components: u1 = lr 8400ae l1 = 4.7 h wurth elektronik 744031004 c1 = 1 x 4.7 f, 0603, x7r/x5r ceramic c2 = 1 x 4.7 f, 0603, x7r/x5r ceramic figure9. single lithium cell to 5v, 250ma
? p ackaging information z sot23-6 pa ckage outline dimensions symbol dimensions in millimeters dimensions in inches min max min max a 1.050 1.250 0.041 0.049 a1 0.000 0.100 0.000 0.004 a2 1.050 1.150 0.041 0.045 b 0.300 0.500 0.012 0.020 c 0.100 0.200 0.004 0.008 d 2.820 3.020 0.111 0.119 e 1.500 1.700 0.059 0.067 e1 2.650 2.950 0.104 0.116 e 0.950(bsc) 0.037(bsc) e1 1.800 2.000 0.071 0.079 l 0.300 0.600 0.012 0.024 0 8 0 8

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